Integrated circuit semiconductor devices may include combinations of transistors having differing characteristics to satisfy a user's particular application. The transistors typically have differing characteristics depending on their function and may be formed in several structures to provide the desired characteristic.
As a particular example, to provide high-integration memory cell arrays, the dimensions of transistors have been reduced. As transistors become smaller, short-channel effects (e.g., a sub-threshold swing or punch-through) may become more frequent or problematic. In order to reduce or prevent punch-through caused by an extension of a depletion region and/or leakage current through the source/drain junction of transistors, transistors on SOI (Silicon-On-Insulator) substrates have been suggested.
FIG. 1 is a cross-sectional view showing a structure of a conventional transistor formed on an SOI (Silicon-On-Insulator) substrate. Referring to FIG. 1, the SO substrate includes a silicon substrate 10, a buried oxide 14 on the silicon substrate 10 and an SOI layer 16 formed on the buried oxide 14. A gate pattern 18 is formed over the SOI layer 16, and source/drain region 20 is formed in the SOI layer 16 at both sides of the gate pattern 18. If the junction depth of the source/drain region 20 and the thickness of the SOI layer 16 are adequately controlled, the source/drain region 20 is isolated in the SOI layer 16. As shown in FIG. 1, because the junction of the source/drain 20 is in contact with the buried oxide 14, it is possible to isolate a leakage current path and to reduce or even prevent a depletion region from being extended. In addition, a transistor may be fully isolated by the buried oxide 14 and a device isolation layer, which may reduce the occurrence of or even prevent latch-up in a CMOS structure.
However, in the conventional transistor structure formed on the SOI substrate as illustrated in FIG. 1, it may be difficult to disperse Joule heating generated by drain voltage and current. Furthermore, it may also be difficult to reduce floating body effect where a threshold voltage of the transistor varies as a result of the storage of charge in an isolated SOI layer. These problems may result in the transistor not operating as desired or suffering physical damage.